Vivanco UNIVERSAL SWITCHMODE AC TO DC MAINS ADAPTERS WITH USB CHARGING FUNCTION Guía de usuario Pagina 59
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Software Design
© 2008 Microchip Technology Inc. DS70320B-page 55
3.3.1.1.1 Digital PFC Implementation Using the dsPIC DSC
Figure 3-4 shows the hardware resources utilized on the primary side dsPIC DSC for
Power Factor Correction.
FIGURE 3-4: dsPIC
®
DSC RESOURCE ALLOCATION FOR PFC BOOST CONVERTER
Table 3-1 lists the resources used on the dsPIC DSC for implementing the PFC control
scheme shown in Figure 3-3.
TABLE 3-1: dsPIC
®
DSC RESOURCES FOR PFC BOOST CONVERTER
The control of the PFC Boost Converter is obtained by varying the duty cycle of the
PWM signal. Only one pin of the PWM is utilized for the PFC control scheme, and
therefore the PWM module is configured for independent output mode. The frequency
of the PWM is determined by the hardware design. It is configured to be approximately
125 kHz.
The Analog Inputs AN4 and AN5 are configured to sample simultaneously. A
conversion is triggered on both AN4 and AN5 once every 3 PWM cycles, and the
current loop is executed on every conversion. The voltage loop is executed only once
in 15 current loop executions.
The Analog Input AN3 measures the AC Input voltage, which is used for generating a
sinusoidal current reference. In the SMPS AC/DC Reference Design, the current
reference value is calculated when the current loop is executed.
VAC
IPFC
VHV_BUS
ADC Channel
ADC
Channel
ADC
Channel
PWM
Output
|V
AC|
k
1
k
2
k
3
FET Driver
dsPIC33FJ16GS504
Description Type of Signal dsPIC
®
DSC Resource Used
V
HV_BUS Analog Input AN5
PFC Current (I
PFC) Analog Input AN4
|VAC| Sense Analog Input AN3
MOSFET Gate Drive Drive Output PWM4L
- SMPS AC/DC Reference Design 1
- User’s Guide 1
- Table of Contents 3
- Appendix B. Test Results 4
- DOCUMENTATION CONVENTIONS 7
- WARRANTY REGISTRATION 8
- RECOMMENDED READING 8
- THE MICROCHIP WEB SITE 8
- CUSTOMER SUPPORT 9
- DOCUMENT REVISION HISTORY 9
- SMPS AC/DC REFERENCE 11
- DESIGN USER’S GUIDE 11
- Chapter 1. Introduction 11
- 1.2 BLOCK DIAGRAM 12
- Introduction 13
- HV Bias Supply 24
- CONVERTERS 28
- Chapter 2. Hardware Design 29
- 2.1.1 Power-Train Design 30
- Hardware Design 31
- 2.2 FULL-BRIDGE ZVT CONVERTER 34
- 41.592.74 38
- Chapter 3. Software Design 55
- Software Design 57
- 3.5.1 Output Sequencing 68
- Table 3- 7 70
- Chapter 4. System Operation 71
- System Operation 73
- 4.1.4 System Connections 74
- 4.2 SYSTEM OPERATION 76
- Board Layouts and Schematics 81
- Test Results 101
- AC and 220 VAC 106
- AC WITH 106
- B.8 TEST RESULTS TABLE 108
- Appendix C. References 113
- Worldwide Sales and Service 118
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